TOC PREV NEXT INDEX

Put your logo here!


18 Memory Addressing Modes in HLA


HLA supports all the 32-bit addressing modes of the Intel 80x86 instruction set1. A memory address on the 80x86 may consist of one to three different components: a displacement (also called an offset), a base pointer, and a scaled index value. The following are the legal combinations of these components:


 
displacement

basePointer

displacement + basePointer

displacement + scaledIndex

basePointer + scaledIndex

displacement + basePointer + scaledIndex


 

The following addressing modes are legal, but are mainly useful only within an LEA instruction:


 
scaledIndex
 
scaledIndex + displacement
 

 

HLA's syntax for memory addressing modes takes the following forms:


 
staticVarName
 

 


staticVarName [ constant ]
 


staticVarName[ breg32 ]
 
staticVarName[ ireg32 ]
 
staticVarName[ ireg32*index ]
 


 

staticVarName[ breg32 + ireg32 ]
 
staticVarName[ breg32 + ireg32*index ]
 
 

staticVarName[ breg32 + constant ]
 
staticVarName[ ireg32 + constant ]
 

 
staticVarName[ ireg32*index + constant ]
 
 

staticVarName[ breg32 + ireg32 + constant ]
 
staticVarName[ breg32 + ireg32*index + constant ]
 
 

staticVarName[ breg32 - constant ]
 
staticVarName[ ireg32 - constant ]
 
staticVarName[ ireg32*index - constant ]
 
 

staticVarName[ breg32 + ireg32 - constant ]
 
staticVarName[ breg32 + ireg32*index - constant ]
 
 

 

localVarName
 
 

localVarName [ constant ]
 
 

localVarName[ ireg32 ]
 
localVarName[ ireg32*index ]
 
 

localVarName[ ireg32 + constant ]
 
localVarName[ ireg32*index + constant ]
 
 

localVarName[ ireg32 - constant ]
 
localVarName[ ireg32*index - constant ]
 


 

basereg:globalVarName
 
 

basereg:globalVarName [ constant ]
 
 

basereg:globalVarName[ ireg32 ]
 
basereg:globalVarName[ ireg32*index ]
 
 

basereg:globalVarName[ ireg32 + constant ]
 
basereg:globalVarName[ ireg32*index + constant ]
 
 

basereg:globalVarName[ ireg32 - constant ]
 
basereg:globalVarName[ ireg32*index - constant ]
 
 

 

[ breg32 ]
 
 

[ breg32 + ireg32 ]
 
[ breg32 + ireg32*index ]
 
 

[ breg32 + constant ]
 
 

[ breg32 + ireg32 + constant ]
 
[ breg32 + ireg32*index + constant ]
 
 

[ breg32 - constant ]
 
 

[ breg32 + ireg32 - constant ]
 
[ breg32 + ireg32*index - constant ]
 
 
 

 

The following are legal, but are only useful within the LEA instruction:

[ ireg32*index ]
 
[ ireg32*index + constant ]
 

 

 

"staticVarName" denotes any static variable currently in scope (local or global).

"localVarName" denotes a local, automatic, variable declared in the var section of the current procedure.

"basereg" denotes any general purpose 32-bit register.

"globalVarname" denotes a non-local variable declared in the VAR section of some procedure other than the current procedure.

"breg32" denotes a base register and can be any general purpose 32-bit register.

"ireg32" denotes an index register and may also be any general purpose register, even the same register as the base register in the address expression.

"index" denotes one of the four constants "1", "2", "4", or "8". In those address expression that have an index register without an index constant, "*1" is the default index.

Those memory addressing modes that do not have a variable name preceding them are known as "anonymous memory locations." Anonymous memory locations do not have a data type associated with them and in many instances you must use the type coercion operator in order to keep HLA happy.

Those memory addressing modes that do have a variable name attached to them inherit the base type of the variable. Read the next section for more details on data typing in HLA.

HLA allows another way to specify addition of the various addressing mode components in an address expression - by putting the components in separate brackets and concatenating them together. The following examples demonstrate the standard syntax and the alternate syntax:

[ebx+2]						[ebx][2]
 
[ebx+ecx*4+8]						[ebx][ecx][8]
 
lbl[ebp-2]						lbl[ebp][-2]
 
[ ebx*8 + 5 ]						[ebx*8][5]
 

 

The reason for allowing the extended syntax is because you might want to construct these addressing modes inside a macro from the individual pieces and it's much easier to concatenate two operands already surrounded by brackets than it is to pick the expressions apart and construct the standard addressing mode.

1It does not support the 16-bit addressing modes since these are not very useful under Win32 or Linux.


TOC PREV NEXT INDEX